Ethernet Access Module

In the receive direction, the Ethernet access module converts optical signals from Ethernet devices such as switches or routers into electrical signals. If the signal is accessed from an electrical interface, no optical conversion is required. At the PHY layer, the Ethernet access module performs decoding operations on the electrical signal and detects the ETH_LOS alarm signal. The Ethernet access module then performs a serial-to-parallel conversion of the electrical signal and sends the converted signal to the network processing module.

In the transmit direction, the Ethernet access module performs the parallel-to-serial conversion operation and encodes the signal and performs the electro-optical conversion operation at the PHY layer.

Network Processing Module

The network processing module consists of a network processor and a switching network. The network processor performs MAC functions first, including code conversion, Ethernet packet framing, CRC checksum and Ethernet performance statistics.

Once the Ethernet frames, which have undergone the stripping operation, have entered the core of the network processor, the data streams are categorized according to service type and configuration requirements. The frames are then encapsulated or decapsulated. The network processing module supports the following encapsulation formats:

• MPLS
• L2 MPLS VPN
• Ethernet/VLAN

In the receive direction, the network processing module performs mapping and forwarding operations on services with Tunnel and VC identifiers added according to the service configuration. In the transmit direction, the network processing module extracts the Tunnel or VC identifiers based on the level of the device (P or PE). Then, the service is distributed or forwarded.

The network processing module supports the following functions:

• Stream detection and stream classification
• Unicasting, multicasting, and broadcasting of streams
• Setting of data priority
• Weighted fair queuing
• Four levels of service hierarchy

RPR protocol processing module

The Resilient Packet Ring performs a weighted fairness algorithm and statistical multiplexing of ring bandwidth. Also, the resilient packet ring provides protection inversion mode. Through the RPR protocol and the RPR weighted fairness algorithm, the PRP protocol processing module controls the bandwidth of each node accessed by the ring. The resilient packet ring also features spatial reuse and statistical multiplexing. As a result, bandwidth utilization is improved.

The feature of topology auto-discovery ensures the plug-and-play nature of the resilient packet ring. The topology auto-discovery protocol provides the means to correctly and reliably discover the topologies of all nodes and the changes in these topologies.

RPR unicast frames are stripped at the destination node, so the bandwidth on the ring is spatially reused.

The RPR ring supports up to 255 nodes.

Mapping Module

The mapping module performs encapsulation and mapping functions.

In the uplink direction, the virtual cascade service supports the LCAS function. The encapsulation formats are LAPS and GFP-F.

In the downlink direction, the mapping module unmaps the SDH signals and compensates for the virtual cascade delay. Through the alignment operation, the mapping module decapsulates the packet according to the encapsulation format. After decapsulation, the data is sent to the RPR protocol processing module.

Interface Conversion Module

The Interface Conversion Module converts the 622M LVDS bus of the SDH system to a parallel bus. The high-speed backplane interface is connected to the system's low-speed interface chip through the Interface Conversion Module.

Logic Control Module

The Logic Control Module consists of a CPU, registers, oscillator, Ethernet port, and HDLC controller. The Logic Control Module is connected to external circuitry via buses to accomplish the following functions:

• Manage and configure other modules on this board.
• Inter-board communication through the internal Ethernet interface.

The control module also contains the basic logic units. The control module accomplishes the following functions:

• Reads and writes registers.
• Provides an interface to the CPU.
• Detects and selects the clock.
• Performs phase identification and frequency division operations on the clock.
• Checks the in-place status of the crossover board, main control board, and circuit board.
• Controls the shutdown operation of the optical module.
• Complete the communication function.
• Controls the indicator light.

Clock Module

The clock module tracks the system reference clock and generates the operating clock needed for each chip. The clock frequency can be 50MHz, 77MHz, 125MHz, or 100MHz.

Power Supply Module

The power supply module converts the -48V/-60V power supply to the DC voltage required by all modules of the single board.