Protection requirements

The H303PV8/H303PV4 board is the V5 protocol processing and master control board, which completes the control of single boards in the same frame and provides the uplink E1 interface for narrowband services, the switching resources for narrowband, and the operating clock.
H303PV8/H303PV4 boards are usually used in pairs, and the two single boards work in a primary and backup mode to provide dual-network and dual-machine hot backup to ensure that the system works safely and reliably. However, the E1 interface does not have a primary backup function, and when two single boards are used, the number of E1 interfaces provided is doubled.
Each H303PV8 board provides 8 E1 interfaces, 8 TTL (Transistor-Transistor Logic (TTL) level) HW interfaces and 32 extended differential HW interfaces. Two H303PV8 boards provide 16 E1 interfaces, 8 TTL HW interfaces in this frame, and 32 extended differential HW interfaces.
The H303PV4 board and the H303PV8 board have the same function and performance index, the difference mainly lies in that the H303PV4 only provides 4 E1 interfaces.
Through the E1 interfaces, the H303PV8/H303PV4 can be interfaced or cascaded with a Local Exchange (LE), OLT (Optical Line Terminal) or ONU (Optical Network Unit).
Depending on the uplink docking device, the H303PV8/H303PV4 boards need to be loaded with different single board software with different characteristics.
l Docking with switch or HONET GV5
H303PV8/H303PV4 provides V5 interface. According to the user's needs, the system clock can be synchronized on any one of the 16 E1s or work on the local oscillating clock. The system monitors the timing source status at any time, and can protect the inversion according to the pre-set clock source priority (up to 8 clock source priorities can be set).
l Docking with MD5500
H303PV8/H303PV4 does not support V5 interface, MD5500 manages H303PV8/H303PV4 through internal protocols. the system clock is preset on the port 0 of the two H303PV8/H303PV4 boards (synchronously connected to the E1 clock) and the local oscillating clock of the two H303PV8/H303PV4 boards. the H303PV8/H303PV4 boards can monitor the status of timing sources at any time. The H303PV8/H303PV4 boards monitor the status of the timing source at any time, and the clock source can be selected according to the priority order of "E1 on port 0 of the primary H303PV8/H303PV4 boards ®E1 on port 0 of the standby H303PV8/H303PV4 boards ®Main Local Oscillator ®Standby Local Oscillator" to carry out the protection reversal.
Table A-1 H303PV8/H303PV4 Panel Descriptions
|
Name |
Meaning |
Description |
Normal state |
|
RUN |
Single board operation status indicator |
1s on/1s off cycle blinking: main use normal; 0.1s on/1.9s off cycle blinking: standby normal; 1.9s on/0.1s off cycle blinking: being smoothed from standby to main use; 0.25s on/0.25s off cycle blinking: loading or the identity of the main backup has not been determined; Cycle less than 0.25s blinking: the loading program is being decompressed. |
Main board: 1s cycle blinking; Backup board: 0.1s on/1.9s off cycle blinking. |
|
CLK |
Single board clock main and standby status Indicator |
Bright: This board's clock is used for main use; Indicator: This board clock is used for main use; Extinguish: This board clock is used for standby. |
Bright/Extinguish |
|
V5S |
Interface Status Indicator |
Motherboard: On: all interfaces are normal; Out: all interfaces are abnormal; Blinking: some interfaces are abnormal, the more abnormal interfaces the higher the blinking frequency; Backup board: always off. |
If the V5 interface is provided, the main board is always on and the backup board is always off; If the V5 interface is not provided, the main board and backup board are always off. |
|
V5L |
Interface Link Status Indicator |
Main board: on: all links are normal; Out: all links are abnormal; Blinking: some links are abnormal, the more abnormal links the higher the blinking frequency; Backup board: always off. |
If the V5 interface is provided, the main board is always on and the backup board is always off; If the V5 interface is not provided, the main and backup boards are always off. |
|
MSL |
Main and backup board communication link status indicator |
1.9s on/0.1s off cycle blinking: link normal; Out: link abnormal. |
1.9s on/0.1s off cycle blinking. |
|
COM |
Network management serial port indicator |
Bright: Communication is normal; Out: abnormal communication. |
Lights up |
|
E1S |
E1 link status indicator |
Selected by the dip switches on the panel to display the status of one of the E1 links on this board Bright: E1 link is normal; Out: E1 link frame out of step or carrier loss; 0.9s on/0.1s off blinking: slip code; 0.5s on/0.5s off blinking: remote frame out of step. |
Bright |
|
NOD |
Master-slave node communication indicator |
0.25s on/0.25s off cycle blinking: communication with the host is not established; 1s on/1s off cycle blinking: normal operation after accepting configuration. |
1s on/1s off cycle blinking. |
|
ETN |
Not used |
None |
Bright |
|
Reset Switch |
Reset Switch |
Used to reset the veneer. |
- |
|
Network Management Serial Port |
Network Management Serial Port |
RS-232 serial port, RJ-45 header, front outlet network management interface. |
- |
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