The operating schematic diagram of the Huawei SSQ5CXLQ41 single board is shown in Figure 1.

Figure 1 Q5CXLQ41 single board working schematic diagram

The working schematic diagram of the Q5CXLQ41/Q6CXLQ41 single board is shown in Figure 2.

Figure 2 Q5CXLQ41/Q6CXLQ41 single board working schematic diagram

Synchronized Timing Module

In the centralized timing distribution mode, the synchronous timing module provides the system clock (T0) for the service board, control unit, and crossover unit. The synchronous timing module selects a clock source from among the reference clock sources as the reference clock for synchronous timing. The reference clock source comes from the line board (T1), the tributary board (T2) or an external synchronized clock source (T3). This generates a synchronized system clock source (T0) and a 2 Mbit/s external synchronization source (T4). The single boards are 1 + 1 hot backed up, so that the master and backup boards both track the same reference source.

The synchronous timing module can extract clocks from the following three timing signals:

• Timing signal from the STM-N line (T1)
• Timing signal from the PDH line (T2)
• Reference signal (T3) from an external synchronized clock source (2MHz or 2Mbit/s)

The timing module outputs the following timing signals:

• T0: System clock (38MHz)
• T4: external timing output signal (2 Mbit/s or 2 MHz)

OSN1500 Optical converter module

• Converts the received optical signal into an electrical signal in the receiving direction.
• In the transmit direction, converts the received electrical signal into an SDH optical signal and sends it to the optical fiber for transmission.
• Detects R_LOS alarm signal and provides laser shutdown function.

MUX/DEMUX Module

• In the receive direction, the DEMUX module demultiplexes high-speed electrical signals into multiple parallel electrical signals and recovers clock signals.
• In the transmit direction, the MUX module multiplexes the parallel electrical signals from the SDH overhead processing module into high-speed electrical signals.

SDH overhead processing module

The SDH overhead processing module contains RST, MST, MSA, and HPT sub-modules.The SDH overhead processing module supports the inner loopback and outer loopback functions.

• RST Submodule
  • In the receive direction, the RST submodule terminates the RSOH: detects the frame location bytes A1 and A2, descrambles all bytes except the bytes in the first row of the RSOH, recovers and examines the regenerative segment trace byte J0, and checks the B1 byte.
  • In the transmit direction, the RST submodule generates the RSOH: writes the bytes A1, A2, J0, calculates and writes the B1 byte, and scrambles all bytes except the first row of bytes of the RSOH.
• MST Submodule
  • In the receive direction, the MST sub-module terminates the MSOH: detects the K2 byte, generates the MS_AIS alarm or the MS_RDI alarm; checks the B2 byte, generates the B2_SD or the B2_EXC alarm, and sends the MS_REI alarm to the opposite end.
  • In the transmit direction, the MST submodule generates MSOH: writes the bytes E2, D4 to D12, K1, K2, S1, M1, etc., calculates the BIP checksum value and writes the B2 byte.
• MSA Submodule
  • In the receive direction, the MSA sub-module interpolates the AUG, divides the AUG into N AU-4 structures, detects the AU_LOP and AU_AIS alarms, and performs pointer adjustment.
  • In the transmit direction, the MSA submodule adds the VC-4 to the AU-PTR to generate the AU-4, and then multiplexes the N AU-4s into AUGs by byte interpolation.
• HPT Submodule
  • In the receive direction, the HPT submodule terminates the POH: checks the B3 byte and sends the HP_REI alarm to the opposite end; detects the J1 and C2 bytes and generates the HP_TIM and HP_SLM alarms (and also generates the HP_UNEQ alarm if it checks that the VC-4 channel is not loaded).
  • In the transmit direction, the HPT submodule generates the POH: writes the J1, C2 and other bytes, calculates the BIP checksum value and writes the B3 byte.

Communication and Control Module

• Selects and tracks the clock signals sent from the master and backup crossover units.
• Completes the laser control function.
• Completes the selection of clock signals and frame header signals from the primary and backup crossover units.
• Completes the control function of the indicators on the single board.
• Provides the CPU control unit.The CPU control unit is used to control and detect other functional modules. When the CPU control unit is powered up, it initializes other functional modules as well.
• Provides the ETH port, which is used as a 10M/100M Ethernet port for network management.
• Provides OAM port, which is used as a serial port for network management. This port can be used as a MODEM port, so it can be configured as a serial port to connect to a MODEM port that is running.
• Provides a COM interface for use as a tuning port.
• Provides a 10M Ethernet port for inter-board communication between the master and backup CXL units.

OSN1500 Cross Connect Module

The cross-connect module consists of the following two parts:

• SNCP module, this module detects relevant alarms and reports alarms to the software for triggering SNCP, MSP and other protection inversions.
• High and low order cross module, this module completes the function of high and low order cross unit.

Power Supply Module

The power supply module converts the -48V/-60V power supply into the required DC voltage for all modules of the single board.

Other Functions

• Responds to and processes Kbytes.
• Collects performance data from optical modules and shuts down the output of optical modules.
• Collects and processes DCC signals for each single board.
• Processes the DCC signals and plugs the processed DCC signals back into each circuit board.
• Monitor the power supply of the veneer boards.
• Reset the units.
• Mask alarms.